Tetris in VHDL

Description
December 10, 2011
The VHDL teacher has made the same remarks every year: no student has ever been able to create Tetris in my classroom. Well, challenge accepted, I said, and proved him wrong. Result: free beer for the whole class!
The project consisted of the game logic in VHDL, an input parser for a connected PS/II keyboard, a framebuffer and output logic to generate VESA VGA signals to display the game on an old-school CRT display. The whole was running on a Xilinx Virtex II-Pro development board.